The application of resolution enhancement techniques improves the resolution of optical lithographic systems and makes feasible the arrangement of dense line fields with a plurality of narrow line structures being arranged in parallel at a narrow pitch along a pitch axis that is perpendicular to the line axis. Dense line fields are obligatory for sensor arrays and memory cell arrays, wherein a plurality of identical cells are arranged along lines. The line structures may be gate line structures connecting the gate electrodes of access transistors of memory cells, data lines or supply lines that are connected to memory cells being arranged along a line.
Usually, the gate, supply and data lines of sensor or memory cells are connected to further electrical circuits via connection lines that are provided in a connection plane above or below the line field. Each array comprises contact structures that connect each single cell, a group of cells, or the cells of one of the lines to a connection line in the connection plane. For these contact structures the resolution enhancement techniques that make feasible the patterning of dense line fields are not applicable to the same degree. For example, the formation of an isolated contact chain with contacts having the same width and being arranged along a pitch axis but lacking of corresponding neighboring structures perpendicular to the pitch axis requires a minimum length of the contacts of about six times the width.
In applications in which the contact structures provide an electrical contact to an impurity region in a semiconductor substrate on which surface gate line structures are arranged, the length of the contact structures may be adjusted by sidewall spacer structures encapsulating the gate line structures. In the course of a transition to even narrower structures having a line width of less than 50 nanometers, the sidewall spacer structures and cap structures that encapsulate the gate lines may not have a sufficient thickness to protect the gate lines against a misaligned etch of the contact holes. Insufficient electrical decoupling or electrical short circuits between the contacts and the gate lines may occur. Further, the required minimum length of the contacts in the connection plane requires a wider distance of neighboring structures such that more substrate area is consumed.
Various techniques for the formation of two-dimensional structures with sublithographic feature size along both planar axes are yet described that require a plurality of additional critical process steps and additional equipment. At the same time, new photo resists developed for further shrinking feature sizes show lower etch selectivity against usual hard mask materials.
Therefore a need exists for a simple and stable method of patterning a substrate that makes feasible the formation of structures with sublithographic planar dimensions in/of layers having a thickness exceeding the planar dimensions.